Browsing by Subject Phase-locked loops
Showing results 1 to 8 of 8
| Issue Date | Title | Author(s) |
| 2005 | 1.6-GHz low power low phase noise quadrature phase locked loop with on chip DC-DC converter for wide tuning range | Casha, Owen; Grech, Ivan; Gatt, Edward; Micallef, Joseph |
| 2009 | CMOS phase-interpolation DDS for an UWB MB OFDM alliance application | Casha, Owen; Grech, Ivan; Badets, Franck |
| 2010 | Experimental results obtained from a 1.6 GHz CMOS quadrature output phase locked loop with on-chip DC-DC converter | Casha, Owen; Grech, Ivan; Gatt, Edward; Micallef, Joseph |
| 2020 | Low speed sensorless current control for PMSM with search-based observer (SBO) | Scicluna, Kris; Spiteri Staines, Cyril; Raute, Reiko |
| 2018 | Modelling and simulation of a PLL-based transmitter for GSM | Moran, Simon (2018) |
| 1991 | Phase-locked loop modelling using SPICE | Formosa, Emanuel (1991) |
| 2020 | Resonant micro-mirror electrical characterisation towards tunable digital drive circuit design | Portelli, Barnaby; Grech, Ivan; Micallef, Joseph; Farrugia, Russell; Casha, Owen; Gatt, Edward |
| 2024 | Seamless low-voltage ride-through control for grid-forming inverter based on virtual synchronous generator (CICED 2024) | Xiao, Zhaoxia; Sun, Puhang; Gao, Jian; Liu, Wenlong; Fang, Hongwei; Micallef, Alexander; Xiong, Junjie; Li, Guangdi |
