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Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/100379
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dc.contributor.authorBriffa, Johann A.-
dc.date.accessioned2022-08-08T06:00:05Z-
dc.date.available2022-08-08T06:00:05Z-
dc.date.issued2013-
dc.identifier.citationBriffa, J. A. (2013). A GPU implementation of a MAP decoder for synchronization error correcting codes. IEEE Communications Letters, 17(5), 996-999.en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar/handle/123456789/100379-
dc.description.abstractIn this paper we present a parallel implementation of a MAP decoder for synchronization error correcting codes. For a modest implementation effort, we demonstrate a considerable decoding speedup, up to two orders of magnitude even on consumer GPUs. This enables the analysis of much larger codes and worse channel conditions than previously possible, and makes applications of such codes feasible for software implementations.en_GB
dc.language.isoenen_GB
dc.publisherIEEEen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectError-correcting codes (Information theory)en_GB
dc.subjectSynchronizationen_GB
dc.subjectGraphics processing unitsen_GB
dc.subjectConvolutions (Mathematics)en_GB
dc.titleA GPU implementation of a MAP decoder for synchronization error correcting codesen_GB
dc.typearticleen_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.en_GB
dc.description.reviewedpeer-revieweden_GB
dc.identifier.doi10.1109/LCOMM.2013.031913.130203-
dc.publication.titleIEEE Communications Lettersen_GB
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