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Title: | On the design of low-voltage, low-power CMOS analog multipliers for RF applications |
Authors: | Debono, Carl James Maloberti, Franco Micallef, Joseph |
Keywords: | Analog CMOS integrated circuits Energy consumption Low voltage systems Radio -- Transmitter-receivers Analog multipliers |
Issue Date: | 2002 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Citation: | Debono, C. J., Maloberti, F., & Micallef, J. (2002). On the design of low-voltage, low-power CMOS analog multipliers for RF applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(2), 168-174. |
Abstract: | Novel low-voltage, low-power techniques in the design of portable wireless communication systems are required. Two system examples of low-power analog multipliers operating from a 1.2 V supply are presented. These proposed structures achieve the required multiplication function by using current processing. The circuits were fabricated using standard double-poly CMOS processes for a 900 MHz application. Measurement results of the prototypes are comparable to other higher voltage designs. |
URI: | https://www.um.edu.mt/library/oar//handle/123456789/16848 |
Appears in Collections: | Scholarly Works - FacICTCCE Scholarly Works - FacICTMN |
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File | Description | Size | Format | |
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On the design of low-voltage, low-power CMOS analog multipliers for RF applications.pdf Restricted Access | On the design of low-voltage, low-power CMOS analog multipliers for RF applications | 397.8 kB | Adobe PDF | View/Open Request a copy |
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