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https://www.um.edu.mt/library/oar/handle/123456789/17248
Title: | An FPGA embedded system architecture for handwritten symbol recognition |
Authors: | Bouvett, Emmanuel Casha, Owen Grech, Ivan Cutajar, Michelle Gatt, Edward Micallef, Joseph |
Keywords: | Field programmable gate arrays Touch screens Self-organizing maps Microcontrollers |
Issue Date: | 2012 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Citation: | Bouvett, E., Casha, O., Grech, I., Cutajar, M., Gatt, E., & Micallef, J. (2012). An FPGA embedded system architecture for handwritten symbol recognition. 16th IEEE Mediterranean Electrotechnical Conference, Yasmine Hammamet. 653-656. |
Abstract: | This paper presents the design of an FPGA-based embedded system architecture for handwritten symbol recognition. The recognition algorithm is based on a self-organizing map neural network and was implemented on a Xilinx XC3S500E FPGA. The neural network operates on a set of chosen symbol features, rather than on the symbol image itself, in order to reduce memory requirements. The implemented system was tested as part of a hand-held calculator application, where an average recognition rate of 85 % was achieved for digit and mathematical symbol operators, which are entered on a touch screen by means of a stylus. The processing load demanded by the implementation is efficiently shared between soft-core processors and other digital logic blocks implemented on the same FPGA, thus employing minimal hardware resources. |
URI: | https://www.um.edu.mt/library/oar//handle/123456789/17248 |
Appears in Collections: | Scholarly Works - FacICTMN |
Files in This Item:
File | Description | Size | Format | |
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An FPGA Embedded System Architecture for Handwritten Symbol Recognition.pdf Restricted Access | An FPGA embedded system architecture for handwritten symbol recognition | 538.14 kB | Adobe PDF | View/Open Request a copy |
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