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https://www.um.edu.mt/library/oar/handle/123456789/17796| Title: | An analog VLSI time-delay neural network implementation for phoneme recognition |
| Authors: | Gatt, Edward Micallef, Joseph Chilton, Edward |
| Keywords: | Integrated circuits -- Very large scale integration Analog CMOS integrated circuits Neural networks (Computer science) Back propagation (Artificial intelligence) Automatic speech recognition |
| Issue Date: | 2000 |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Citation: | Gatt, E., Micallef, J., & Chilton, E. (2000). An analog VLSI time-delay neural network implementation for phoneme recognition. 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000), Catania. 315-320. |
| Abstract: | The paper proposes an analog VLSI neural network chip, which can be cascaded in order to develop a time-delay neural network system for phoneme recognition. Backpropagation learning has been adopted to train the network to recognise phoneme frames extracted from the TIMIT database. A prototype chip, implemented using CMOS 2.0 /spl mu/m, double metal, double poly technology is also described together with its specifications. |
| URI: | https://www.um.edu.mt/library/oar//handle/123456789/17796 |
| Appears in Collections: | Scholarly Works - FacICTMN |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| An analog VLSI time-delay neural network implementation for phoneme recognition.pdf Restricted Access | An analog VLSI time-delay neural network implementation for phoneme recognition | 280.03 kB | Adobe PDF | View/Open Request a copy |
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