VHDL implemetation of a DMX512 decoder on a FPGA

Abstract

This paper presents the hardware implementation and verification of an FPGA-based DMX512 decoder using VHDL as a Hardware Description Language. The implementation is proposed to provide a single chip solution to decode the DMX512 serial data generated from a control desk, whilst providing control data and processing mechanisms on the same chip. In particular, such an FPGA solution would be superior to a microcontroller counterpart in a scenario where a large number of integrated chips need to communicate together to perform their respective tasks. Moreover, more than one system can be implemented on the same FPGA chip thus reducing costs and physical size. As a proof of concept, the developed architecture is applied to a laser-based light pattern projection system.