Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/17875
Title: Design of a hardware-based discrete wavelet transform architecture for phoneme recognition
Authors: Cutajar, Michelle
Gatt, Edward
Grech, Ivan
Casha, Owen
Micallef, Joseph
Keywords: Field programmable gate arrays
Speech processing systems
Wavelets (Mathematics)
Computer architecture
Issue Date: 2014
Publisher: IEEE Computer Society
Citation: Cutajar, M., Gatt, E., Grech, I., Casha, O., & Micallef, J. (2014). Design of a hardware-based discrete wavelet transform architecture for phoneme recognition. 6th International Symposium on Communications, Control and Signal Processing (ISCCSP), Athens. 554-557.
Abstract: This paper presents the design of a digital hardware implementation based on Discrete Wavelet Transforms (DWTs) for the task of feature extraction in a multi-speaker phoneme recognition system. This is the first research where the design of a hardware-based DWT design is directed towards a speech recognition application. In the proposed architecture, the lifting-scheme approach employing the orthogonal Daubechies wavelet of order 5 was considered. The designed system was synthesised on a Xilinx Virtex-II XC2V3000 FPGA, and evaluated with the TIMIT corpus. This hardware-based DWT architecture is then intended to be implemented on a dedicated chip, along with the hardware implementation of the classification stage of the proposed phoneme recognition system, in order to further improve the resultant performance.
URI: https://www.um.edu.mt/library/oar//handle/123456789/17875
Appears in Collections:Scholarly Works - FacICTMN

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