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dc.contributor.authorFrancalanza, Adrian-
dc.contributor.authorAceto, Luca-
dc.contributor.authorIngólfsdóttir, Anna-
dc.date.accessioned2017-10-31T10:35:05Z-
dc.date.available2017-10-31T10:35:05Z-
dc.date.issued2017-
dc.identifier.citationFrancalanza, A., Aceto, L., & Ingolfsdottir, A. (2017). Monitorability for the Hennessy-Milner logic with recursion. Formal Methods in System Design, 51,(1) 1-32.en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar//handle/123456789/23175-
dc.description.abstractWe study μ HML, a branching-time logic with least and greatest fixpoints, from a runtime verification perspective. The logic may be used to specify properties of programs whose behaviour may be expressed as a labelled transition system. We establish which subset of this logic can be monitored for at runtime by merely observing the runtime execution of a program. A monitor-synthesis algorithm is defined for this subset, where it is shown that the resulting synthesised monitors correctly perform the required analysis from the observed behaviour. We also prove completeness results wrt. this logical subset that show that, up to logical equivalence, no other properties apart from those identified can be monitored for and verified at runtime.en_GB
dc.language.isoenen_GB
dc.publisherSpringer New York LLCen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectComputer software -- Verificationen_GB
dc.subjectAspect-oriented programmingen_GB
dc.subjectComputer software -- Testingen_GB
dc.subjectComputer multitaskingen_GB
dc.titleMonitorability for the Hennessy-Milner logic with recursionen_GB
dc.typearticleen_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holderen_GB
dc.description.reviewedpeer-revieweden_GB
dc.identifier.doi10.1007/s10703-017-0273-z-
dc.publication.titleFormal Methods in System Designen_GB
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