Please use this identifier to cite or link to this item:
https://www.um.edu.mt/library/oar/handle/123456789/24013
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Pace, Gordon J. | - |
dc.contributor.author | He, Jifeng | - |
dc.date.accessioned | 2017-11-21T08:35:45Z | - |
dc.date.available | 2017-11-21T08:35:45Z | - |
dc.date.issued | 1998 | - |
dc.identifier.citation | Pace, G. J., & He, J. (1998). Formal reasoning with Verilog HDL. Workshop on Formal Techniques for Hardware and Hardware-like Systems, Marstrand. 1-15. | en_GB |
dc.identifier.uri | https://www.um.edu.mt/library/oar//handle/123456789/24013 | - |
dc.description.abstract | Most hardware verification techniques tend to fall under one of two broad, yet separate caps: simulation or formal verification. This paper briefly presents a framework in which formal verification plays a crucial role within the standard approach currently used by the hardware industry. As a basis for this, the formal semantics of Verilog HDL are dened, and properties about synchronization and mutual exclusion algorithms are proved. | en_GB |
dc.language.iso | en | en_GB |
dc.publisher | University of Malta. Faculty of ICT | en_GB |
dc.rights | info:eu-repo/semantics/openAccess | en_GB |
dc.subject | Computer hardware description languages | en_GB |
dc.subject | Object-oriented methods (Computer science) | en_GB |
dc.subject | Computer programs -- Verification | en_GB |
dc.title | Formal reasoning with Verilog HDL | en_GB |
dc.type | conferenceObject | en_GB |
dc.rights.holder | The copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder | en_GB |
dc.bibliographicCitation.conferencename | Workshop on Formal Techniques for Hardware and Hardware-like Systems | en_GB |
dc.bibliographicCitation.conferenceplace | Marstrand, Sweden, June 1998 | en_GB |
dc.description.reviewed | peer-reviewed | en_GB |
Appears in Collections: | Scholarly Works - FacICTCS |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
download (5).pdf | 209.73 kB | Adobe PDF | View/Open |
Items in OAR@UM are protected by copyright, with all rights reserved, unless otherwise indicated.