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Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/58893
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dc.contributor.authorCasha, Owen-
dc.contributor.authorGrech, Ivan-
dc.contributor.authorBadets, Franck-
dc.contributor.authorMorche, Dominique-
dc.contributor.authorMicallef, Joseph-
dc.date.accessioned2020-07-17T09:57:13Z-
dc.date.available2020-07-17T09:57:13Z-
dc.date.issued2009-
dc.identifier.citationCasha, O., Grech, I., Badets, F., Morche, D., & Micallef, J. (2009). Analysis of the spur characteristics of edge-combining DLL-based frequency multipliers. IEEE Transactions on Circuits and Systems II: Express Briefs, 56(2), 132-136.en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar/handle/123456789/58893-
dc.description.abstractA complete analysis of the spur characteristics of edge-combining delay-locked loop (DLL)-based frequency multipliers is presented in this brief. The novelty of this analysis is the fact that it can be used to estimate the effect of both the in-lock error and the delay-stage mismatch on the spurious level of the frequency multiplier with low computational complexity. In addition, a way to reduce the mismatch between the delay cells in the delay line is discussed via an analytic model and verified by the implementation of a delay cell in a 65-nm CMOS process.en_GB
dc.language.isoenen_GB
dc.publisherInstitute of Electrical and Electronics Engineersen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectFrequency synthesizersen_GB
dc.subjectFrequency changersen_GB
dc.subjectAnalog CMOS integrated circuitsen_GB
dc.titleAnalysis of the spur characteristics of edge-combining DLL-based frequency multipliersen_GB
dc.typearticleen_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.en_GB
dc.description.reviewedpeer-revieweden_GB
dc.identifier.doi10.1109/TCSII.2008.2011605-
dc.publication.titleIEEE Transactions on Circuits and Systems II : Express Briefsen_GB
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