Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/68417
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dc.date.accessioned2021-02-03T08:48:11Z-
dc.date.available2021-02-03T08:48:11Z-
dc.date.issued2020-
dc.identifier.citationMuscat, A. (2020). Development of an FPGA based ECU for a petrol engine (Bachelor's dissertation).en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar/handle/123456789/68417-
dc.descriptionB.SC.(HONS)COMPUTER ENG.en_GB
dc.description.abstractAll modern automotive engines feature a device known as an Engine Control Unit (ECU), which is used to control emissions, performance, and efficiency. An ECU works by having several different sensors within an engine that continuously monitor some parameters and using this information it processes it to control certain variables such as amount of fuel sent into an engine and when to ignite it. Many automotive companies strive to make an ECU that brings out the most potential from an engine. Some of these ECUs feature various engine mappings, so that one could switch from an “economy mode” into a “sport mode” where an engine shifts its behaviour from being fuel efficient to a more powerful mode. Certain functions can only be implemented with the use of an ECU, such as Volkswagen’s Active Cylinder Technology (ACT) where while under low load, an engine can cut the fuel supply to some of the cylinders to save fuel. These functions help higher performance engines to survive in a world where emissions and fuel economy are of high priority, providing a very good balance between engine performance, emissions, and fuel economy. This project shall contain both the hardware design of an ECU on a Genesys Virtex 5 FPGA along with a sensor interfacing circuit. Programming will be done in VHDL and will be used to process the information received from sensors and outputting the signals to the engine components. The sensor interfacing circuit built was to properly interface the signals to the various sensors as well as protect the board. The TLP250 optocoupler was especially used to isolate and protect the FPGA from voltages as well as drive higher voltage components.en_GB
dc.language.isoenen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectAutomobilesen_GB
dc.subjectAutomobiles -- Motors -- Computer control systemsen_GB
dc.subjectField programmable gate arraysen_GB
dc.titleDevelopment of an FPGA based ECU for a petrol engineen_GB
dc.typebachelorThesisen_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.en_GB
dc.publisher.institutionUniversity of Maltaen_GB
dc.publisher.departmentFaculty of Information and Communication Technology. Department of Communications and Computer Engineeringen_GB
dc.description.reviewedN/Aen_GB
dc.contributor.creatorMuscat, Andrew-
Appears in Collections:Dissertations - FacICT - 2020
Dissertations - FacICTCCE - 2020

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