Design of a multistage noise shaping (MASH) converter using the 0.35 μm CMOS process

Abstract

Delta-sigma modulators are responsible for moving noise out-of-band. Out of band noise is the noise contained outside audible frequencies. Audible frequencies range from 20Hz to 20kHz. Higher-order delta-sigma modulators have a steeper roll-off as in the more abrupt roll off in a higher order electronic filter [1]. Instability issues may be resolved by using alternative structures such as the multi-stage noise shaping (MASH) delta-sigma converter. The principle of such delta-sigma converters is the quantisation error which is cancelled at each stage. The only quantisation error is left at the output of the final delta-sigma stage, which is passed through a discrete differentiator stage. It is fundamental to point out that the output of a MASH converter is not bitstream, but a PCM output with 2N discrete levels, where N is the number of stages in the MASH converter [2]. The design of a folded-cascode OTA, the dynamic comparator and switched-capacitor circuit blocks are discussed, each of which are used in the structure of the Sigma-Delta (ΣΔ). The behaviour of a 1st order, 2nd order and 3rd order ΣΔM are fully analysed in Cadence Virtuoso using 0.35μm CMOS technology and the results are validated in Simulink.