Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/85898
Title: Comparing controlled system synthesis and suppression enforcement
Authors: Aceto, Luca
Cassar, Ian
Francalanza, Adrian
Ingólfsdóttir, Anna
Keywords: Software engineering
Computer programs -- Verification
Component software
System design
Parallel processing (Electronic computers)
Issue Date: 2021
Publisher: Springer-Verlag
Citation: Aceto, L., Cassar, I., Francalanza, A., & Ingólfsdóttir, A. (2021). Comparing controlled system synthesis and suppression enforcement. International Journal on Software Tools for Technology Transfer, 23(4), 601-614.
Abstract: Runtime enforcement and control system synthesis are two verification techniques that automate the process of transforming an erroneous system into a valid one. As both techniques can modify the behaviour of a system to prevent erroneous executions, they are both ideal for ensuring safety. In this paper, we investigate the interplay between these two techniques and identify control system synthesis as being the static counterpart to suppression-based runtime enforcement, in the context of safety properties.
URI: https://www.um.edu.mt/library/oar/handle/123456789/85898
Appears in Collections:Scholarly Works - FacICTCS

Files in This Item:
File Description SizeFormat 
Comparing controlled system synthesis.pdf
  Restricted Access
771.91 kBAdobe PDFView/Open Request a copy


Items in OAR@UM are protected by copyright, with all rights reserved, unless otherwise indicated.