Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/92937
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dc.date.accessioned2022-04-04T12:12:40Z-
dc.date.available2022-04-04T12:12:40Z-
dc.date.issued2011-
dc.identifier.citationCamilleri, S. (2011). Implementation of a floating point VHDL arithmetic library (Bachelor's dissertation).en_GB
dc.identifier.urihttps://www.um.edu.mt/library/oar/handle/123456789/92937-
dc.descriptionB.SC.(HONS)COMPUTER ENG.en_GB
dc.description.abstractFloating point arithmetic is used in many applications and is found in several areas nowadays such as optimisation of mathematical functions, image processing algorithms, artificial neural networks and digital signal processors, especially real-time signal processing. The use of high level languages, such as VHDL and Verilog has made floating point operations easier to implement on Field Programmable Gate Arrays (FPGAs). Due to the increase in use of floating point notation, a ready-made floating point library would significantly aid developers in creating new applications at a lower cost and greater range. The aim of this project is to build a floating point library which supports several arithmetic operations which are used frequently in applications as mentioned previously. Several algorithms for different arithmetic operations were studied and chosen appropriately in order to be implemented into a library. The implementation also includes variable size floating point arithmetic, which lets the developer to choose freely the range and precision of the floating point operation. Xilinx 10.1 was used to implement the library and run the simulations in order to verify the functionality of the floating point operations.en_GB
dc.language.isoenen_GB
dc.rightsinfo:eu-repo/semantics/restrictedAccessen_GB
dc.subjectVHDL (Computer hardware description language)en_GB
dc.subjectComputer hardware description languagesen_GB
dc.subjectApplication softwareen_GB
dc.titleImplementation of a floating point VHDL arithmetic libraryen_GB
dc.typebachelorThesisen_GB
dc.rights.holderThe copyright of this work belongs to the author(s)/publisher. The rights of this work are as defined by the appropriate Copyright Legislation or as modified by any successive legislation. Users may access this work and can make use of the information contained in accordance with the Copyright Legislation provided that the author must be properly acknowledged. Further distribution or reproduction in any format is prohibited without the prior permission of the copyright holder.en_GB
dc.publisher.institutionUniversity of Maltaen_GB
dc.publisher.departmentFaculty of Information & Communication Technology. Department of Communications and Computer Engineeringen_GB
dc.description.reviewedN/Aen_GB
dc.contributor.creatorCamilleri, Steve (2011)-
Appears in Collections:Dissertations - FacICTCCE - 1999-2013

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