Multiprocessing environment on an FPGA

Abstract

The idea behind multiprocessing is to have multiple processors working together in order to handle a bigger workload and achieve shorter execution times. To make all this possible, processors in a multiprocessor system need to be able to communicate information and data to each other. The Xilinx Mailbox IP core uses a message passing communication protocol which allows data to be transferred in a bi-directional manner between two processors. The Mailbox has two FIFOs which act as buffers for the data being sent between the processors. It has a simple structure, but is crucial in a multiprocessor system since, without communication, the processors cannot work together. In this project, three hardware systems were built usmg the Xilinx Platform Studio (XPS): a uniprocessor system, a dual processor system, and a triple processor system. The MicroBlaze softcore processor was used in all the three systems. The main means of communication between the processors was established by using the Xilinx Mailbox IP core. In order to test the hardware systems and compare them to each other, a self-organizing map (SOM) was implemented as software (in C language) to run on the hardware systems. A SOM is a type of neural network which is trained without any supervision and is mainly used for pattern recognition. The SOM was chosen as an application for the hardware systems mainly because of its computationally intensive and highly parallelizable algorithm. The parallel part of the algorithm was run simultaneously on all the processors in the multiprocessor systems. The initial data is given to only one processor which then communicates this data to the other processors via the Mailboxes in the systems. The other processors then send back their part of the results to the main processor so that it can collate the results, d.o any serial processing on it, and finally output the results. The programs were developed by using the Xilinx Software Development Kit (SDK). Simulations of the hardware systems were carried out so that the behavior of the systems and timings of various instructions were observed. After the programs were nm on the systems, the results showed a speedup of approximately 41 % and 57% over the uniprocessor system when using the dual processor and triple processor systems respectively. This shows that the Mailbox core is efficient for small message passing.