Please use this identifier to cite or link to this item:
https://www.um.edu.mt/library/oar/handle/123456789/94858| Title: | Hardware implementation of a JPEG encoder |
| Authors: | Schembri, Lara (2010) |
| Keywords: | JPEG (Image coding standard) Image processing -- Digital techniques Computer vision |
| Issue Date: | 2010 |
| Citation: | Schembri, L. (2010). Hardware implementation of a JPEG encoder (Bachelor's dissertation). |
| Abstract: | The aim of this study is the design and implementation of the JPEG baseline image compression standard. The architecture exploits the principle of image compression and manipulation of the image without losing quality in the process. During this study, different algorithms used in literature to implement the JPEG encoder were studied and the most efficient design for every step was chosen. The JPEG encoder was designed on Matlab and Modelsim. The implementation of this project was successful in achieving significant compression ratios. The design was then implemented on the FPGA by using Xilinx 9.1 webpack |
| Description: | B.Sc. IT (Hons)(Melit.) |
| URI: | https://www.um.edu.mt/library/oar/handle/123456789/94858 |
| Appears in Collections: | Dissertations - FacICT - 2010 Dissertations - FacICTCIS - 2010-2015 |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| B.SC.(HONS)ICT_Schembri_Lara_2010.pdf Restricted Access | 9.94 MB | Adobe PDF | View/Open Request a copy |
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