Phase-locked loop modelling using SPICE

Abstract

1.1.1 Free Running Frequency (Or Centre Frequency) This is the voltage controlled oscillator (VCO) frequency, when the loop is in the unlocked free running condition. This frequency corresponds to zero applied D.C. error voltage at the VCO's control input. 1.1.2 Lock Range (Or Synchronization Range) This is the range of input signal frequencies over which the loop tan maintain lock. The relation between tracking (or hold in range) and lock range is shown in the diagram below. 1.1.3 Capture Range (Or Acquisition Range) This is the range of input signal frequencies centred (like the lock range) on the free running frequency onto which the loop can pass from the unlocked free running state to the locked state. The relation between the lock-in range pull-in range) and the capture range is shown in the diagram below. (Note: Capture Range < Lock Range, always.) 1 .1 .4 Lock Up Time (Or Acquisition Time) The transient time required for the loop to pass from the free running state to the locked state (considered again under the heading "The Capture process" - Chapter 2) . This time is dependent on all components in the loop but mainly on the filter time constant. 1.2 PLL Frequency To Voltage Transfer Characteristics If the input frequencies is gradually increased from 0 Hz to higher ones the following happens: when the frequency reaches the lower edge of the capture range the loop locks; the loop remains locked until the upper edge of the lock range is reached.