Please use this identifier to cite or link to this item: https://www.um.edu.mt/library/oar/handle/123456789/95320
Title: Implementation of CAN bus on FPGA
Authors: Vella, Paula (2013)
Keywords: Controller Area Network (Computer network)
Field programmable gate arrays
VHDL (Computer hardware description language)
Issue Date: 2013
Citation: Vella, P. (2013). Implementation of CAN bus on FPGA (Bachelor's dissertation).
Abstract: A Controller Area Network (CAN) is highly used in various high-level industrial systems which base their implementation on CAN as their physical layer. It has several distinctive features which provide incredible flexibility in the implemented system. Nowadays, devices are becoming faster, smaller and offer a wide range of functions along with the option to upgrade its design to provide more features. An FPGA board reaches these expectations and therefore this FYP proposes a CAN system implemented on an FPGA in VHDL. High-level languages, such as Verilog and VHDL, ease the implementation of such systems. The aim of the project is to implement a CAN system which is able to interact with other similar CAN nodes by receiving and transmitting different types of messages. The CAN system was implemented and tested on a Genesys Virtex-5 FPGA board manufactured by Digilent. This board provides a large number of hardware resources to work with.
Description: B.SC.(HONS)COMPUTER ENG.
URI: https://www.um.edu.mt/library/oar/handle/123456789/95320
Appears in Collections:Dissertations - FacICT - 2013
Dissertations - FacICTCCE - 1999-2013

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