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Title: | Verification of a VHDL GPS baseband processor using a simulink-based test bench generator |
Authors: | Zarb, Terence Grech, Ivan Gatt, Edward Casha, Owen Micallef, Joseph |
Keywords: | Global Positioning System Field programmable gate arrays Radio frequency modulation Artificial satellites in telecommunication |
Issue Date: | 2011 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Citation: | Zarb, T., Grech, I., Gatt, E., Casha, O., & Micallef, J. (2011). Verification of a VHDL GPS baseband processor using a simulink-based test bench generator. 17th IEEE International Conference on Electronics, Circuits and Systems, Athens. 327-330. |
Abstract: | In the last decades, Global Positioning System (GPS) receivers have become more popular and are now incorporated in mobile phone electronics and also in navigation systems, namely in automotive, marine and aerospace equipment. This paper presents the design of various digital signal processing (DSP) and communication blocks which form an integral part of a typical L1-band Coarse/Acquisition (C/A)-code baseband receiver. These modules are designed using synthesizable VHDL code and implemented on a Field Programmable Gate Array (FPGA). Furthermore, a novel satellite signal modulation model is also designed to model how signals are generated by the satellites. This is designed to ultimately generate the VHDL test-bench to verify the functionality of the designed receiver. This model can be extended to cater for second order effects such as Doppler shifts, atmospheric delays and weather conditions. In this work, the noise performance of the receiver is analyzed. It is noted that the minimum signal-to-noise ratio (SNR) that the baseband processor can tolerate is −10 dB given a correlation window of 2 ms. |
URI: | https://www.um.edu.mt/library/oar//handle/123456789/17829 |
Appears in Collections: | Scholarly Works - FacICTMN |
Files in This Item:
File | Description | Size | Format | |
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VERIFICATION OF A VHDL GPS BASEBAND PROCESSOR USING A SIMULINK-BASED TEST BENCH GENERATOR.pdf Restricted Access | Verification of a VHDL GPS baseband processor using a simulink-based test bench generator | 764.76 kB | Adobe PDF | View/Open Request a copy |
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