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https://www.um.edu.mt/library/oar/handle/123456789/58893| Title: | Analysis of the spur characteristics of edge-combining DLL-based frequency multipliers |
| Authors: | Casha, Owen Grech, Ivan Badets, Franck Morche, Dominique Micallef, Joseph |
| Keywords: | Frequency synthesizers Frequency changers Analog CMOS integrated circuits |
| Issue Date: | 2009 |
| Publisher: | Institute of Electrical and Electronics Engineers |
| Citation: | Casha, O., Grech, I., Badets, F., Morche, D., & Micallef, J. (2009). Analysis of the spur characteristics of edge-combining DLL-based frequency multipliers. IEEE Transactions on Circuits and Systems II: Express Briefs, 56(2), 132-136. |
| Abstract: | A complete analysis of the spur characteristics of edge-combining delay-locked loop (DLL)-based frequency multipliers is presented in this brief. The novelty of this analysis is the fact that it can be used to estimate the effect of both the in-lock error and the delay-stage mismatch on the spurious level of the frequency multiplier with low computational complexity. In addition, a way to reduce the mismatch between the delay cells in the delay line is discussed via an analytic model and verified by the implementation of a delay cell in a 65-nm CMOS process. |
| URI: | https://www.um.edu.mt/library/oar/handle/123456789/58893 |
| Appears in Collections: | Scholarly Works - FacICTMN |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Analysis_of_the_spur_characteristics_of_edge-combining_DLL-based_frequency_multipliers_2009.pdf Restricted Access | 385.09 kB | Adobe PDF | View/Open Request a copy |
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